SNL – SLAC Neural Network Library
SNL is a high-level synthesis (HLS)-based framework developed at SLAC National Accelerator Laboratory to deploy moderately sized neural networks (on the order of tens of thousands to hundreds of thousands of parameters) onto FPGAs (and potentially eFPGAs/ASICs) for ultra-low-latency inference (micro-seconds to a few milliseconds) in real-time scientific and autonomous control applications. It offers a Keras-style API for defining multi-layer model architectures and supports streaming dataflow between layers to minimise buffering overhead and latency. A key differentiator is its ability to reload network weights and biases at run-time without requiring FPGA resynthesis, enabling rapid adaptation in changing experimental conditions. SNL is targeted at high-throughput and dynamic environments (for example detector read-out chains in FELs and magnetic fusion reactors and for target tracking and adaptation for inertial fusion injectors) where data rates and latency budgets are extreme, and where embedding inference logic close to the sensor and eliminating large storage/transfer delays is critical.
- Provides specialized set of libraries for deploying ML inference to FPGA
- Using High-Level-Synthesis (HSL): C++ programming of FPGA
- Supports Keras like API for layer definition
- Dynamic reloading of weights and biases to avoid re-synthesis
- Supports 10s of thousands of parameters or more depending on latency requirements for the inference model
- Total end to end latency of couple of usec to couple of millisecond.
- Streaming interface between layers.
- Allow for pipeline of the data flow for a balance of latency vs frame rate
- Library approach allows for user/application specific enhancements
SNL Papers
- Implementation of a framework for deploying AI inference engines in FPGAs: https://arxiv.org/abs/2305.19455
- FPGA-accelerated SpeckleNN with SNL for real-time X-ray single-particle imaging: https://www.frontiersin.org/journals/high-performance-computing/articles/10.3389/fhpcp.2025.1520151/full
- Neural Network Acceleration on MPSoC board: Integrating SLAC's SNL, Rogue Software and Auto-SNL: https://arxiv.org/abs/2508.21739
- Analysis of Hardware Synthesis Strategies for Machine Learning in Collider Trigger and Data Acquisition: https://arxiv.org/abs/2411.11678
- FPGA-Accelerated Real-Time Beam Emission Spectroscopy Diagnostics at DIII-D Using the SLAC Neural Network Library for ML Inference: https://arxiv.org/abs/2511.21924